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Diffstat (limited to 'third_party/aom/av1/common/av1_inv_txfm1d_cfg.h')
-rw-r--r--third_party/aom/av1/common/av1_inv_txfm1d_cfg.h200
1 files changed, 102 insertions, 98 deletions
diff --git a/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h b/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h
index f30f915765..8bcf84e059 100644
--- a/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h
+++ b/third_party/aom/av1/common/av1_inv_txfm1d_cfg.h
@@ -13,16 +13,31 @@
#define AV1_INV_TXFM2D_CFG_H_
#include "av1/common/av1_inv_txfm1d.h"
+// sum of fwd_shift_##
+#if CONFIG_CHROMA_2X2
+#if CONFIG_TX64X64
+static const int8_t fwd_shift_sum[TX_SIZES] = { 3, 2, 1, 0, -2, -4 };
+#else // CONFIG_TX64X64
+static const int8_t fwd_shift_sum[TX_SIZES] = { 3, 2, 1, 0, -2 };
+#endif // CONFIG_TX64X64
+#else // CONFIG_CHROMA_2X2
+#if CONFIG_TX64X64
+static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2, -4 };
+#else // CONFIG_TX64X64
+static const int8_t fwd_shift_sum[TX_SIZES] = { 2, 1, 0, -2 };
+#endif // CONFIG_TX64X64
+#endif // CONFIG_CHROMA_2X2
+
// ---------------- 4x4 1D config -----------------------
// shift
static const int8_t inv_shift_4[2] = { 0, -4 };
// stage range
-static const int8_t inv_stage_range_col_dct_4[4] = { 18, 18, 17, 17 };
-static const int8_t inv_stage_range_row_dct_4[4] = { 18, 18, 18, 18 };
-static const int8_t inv_stage_range_col_adst_4[6] = { 18, 18, 18, 18, 17, 17 };
-static const int8_t inv_stage_range_row_adst_4[6] = { 18, 18, 18, 18, 18, 18 };
-static const int8_t inv_stage_range_idx_4[1] = { 18 };
+static const int8_t inv_stage_range_col_dct_4[4] = { 3, 3, 2, 2 };
+static const int8_t inv_stage_range_row_dct_4[4] = { 3, 3, 3, 3 };
+static const int8_t inv_stage_range_col_adst_4[6] = { 3, 3, 3, 3, 2, 2 };
+static const int8_t inv_stage_range_row_adst_4[6] = { 3, 3, 3, 3, 3, 3 };
+static const int8_t inv_stage_range_idx_4[1] = { 0 };
// cos bit
static const int8_t inv_cos_bit_col_dct_4[4] = { 13, 13, 13, 13 };
@@ -35,13 +50,11 @@ static const int8_t inv_cos_bit_row_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
static const int8_t inv_shift_8[2] = { 0, -5 };
// stage range
-static const int8_t inv_stage_range_col_dct_8[6] = { 19, 19, 19, 19, 18, 18 };
-static const int8_t inv_stage_range_row_dct_8[6] = { 19, 19, 19, 19, 19, 19 };
-static const int8_t inv_stage_range_col_adst_8[8] = { 19, 19, 19, 19,
- 19, 19, 18, 18 };
-static const int8_t inv_stage_range_row_adst_8[8] = { 19, 19, 19, 19,
- 19, 19, 19, 19 };
-static const int8_t inv_stage_range_idx_8[1] = { 19 };
+static const int8_t inv_stage_range_col_dct_8[6] = { 5, 5, 5, 5, 4, 4 };
+static const int8_t inv_stage_range_row_dct_8[6] = { 5, 5, 5, 5, 5, 5 };
+static const int8_t inv_stage_range_col_adst_8[8] = { 5, 5, 5, 5, 5, 5, 4, 4 };
+static const int8_t inv_stage_range_row_adst_8[8] = { 5, 5, 5, 5, 5, 5, 5, 5 };
+static const int8_t inv_stage_range_idx_8[1] = { 0 };
// cos bit
static const int8_t inv_cos_bit_col_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
@@ -58,15 +71,13 @@ static const int8_t inv_cos_bit_row_adst_8[8] = {
static const int8_t inv_shift_16[2] = { -1, -5 };
// stage range
-static const int8_t inv_stage_range_col_dct_16[8] = { 19, 19, 19, 19,
- 19, 19, 18, 18 };
-static const int8_t inv_stage_range_row_dct_16[8] = { 20, 20, 20, 20,
- 20, 20, 20, 20 };
-static const int8_t inv_stage_range_col_adst_16[10] = { 19, 19, 19, 19, 19,
- 19, 19, 19, 18, 18 };
-static const int8_t inv_stage_range_row_adst_16[10] = { 20, 20, 20, 20, 20,
- 20, 20, 20, 20, 20 };
-static const int8_t inv_stage_range_idx_16[1] = { 20 };
+static const int8_t inv_stage_range_col_dct_16[8] = { 7, 7, 7, 7, 7, 7, 6, 6 };
+static const int8_t inv_stage_range_row_dct_16[8] = { 7, 7, 7, 7, 7, 7, 7, 7 };
+static const int8_t inv_stage_range_col_adst_16[10] = { 7, 7, 7, 7, 7,
+ 7, 7, 7, 6, 6 };
+static const int8_t inv_stage_range_row_adst_16[10] = { 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7 };
+static const int8_t inv_stage_range_idx_16[1] = { 0 };
// cos bit
static const int8_t inv_cos_bit_col_dct_16[8] = {
@@ -85,17 +96,15 @@ static const int8_t inv_cos_bit_row_adst_16[10] = { 12, 12, 12, 12, 12,
static const int8_t inv_shift_32[2] = { -1, -5 };
// stage range
-static const int8_t inv_stage_range_col_dct_32[10] = { 19, 19, 19, 19, 19,
- 19, 19, 19, 18, 18 };
-static const int8_t inv_stage_range_row_dct_32[10] = { 20, 20, 20, 20, 20,
- 20, 20, 20, 20, 20 };
-static const int8_t inv_stage_range_col_adst_32[12] = {
- 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
-};
-static const int8_t inv_stage_range_row_adst_32[12] = {
- 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
-};
-static const int8_t inv_stage_range_idx_32[1] = { 20 };
+static const int8_t inv_stage_range_col_dct_32[10] = { 9, 9, 9, 9, 9,
+ 9, 9, 9, 8, 8 };
+static const int8_t inv_stage_range_row_dct_32[10] = { 9, 9, 9, 9, 9,
+ 9, 9, 9, 9, 9 };
+static const int8_t inv_stage_range_col_adst_32[12] = { 9, 9, 9, 9, 9, 9,
+ 9, 9, 9, 9, 8, 8 };
+static const int8_t inv_stage_range_row_adst_32[12] = { 9, 9, 9, 9, 9, 9,
+ 9, 9, 9, 9, 9, 9 };
+static const int8_t inv_stage_range_idx_32[1] = { 0 };
// cos bit
static const int8_t inv_cos_bit_col_dct_32[10] = { 13, 13, 13, 13, 13,
@@ -109,14 +118,15 @@ static const int8_t inv_cos_bit_row_adst_32[12] = { 12, 12, 12, 12, 12, 12,
// ---------------- 64x64 1D constants -----------------------
// shift
-static const int8_t inv_shift_64[2] = { -1, -7 };
+static const int8_t inv_shift_64[2] = { -1, -5 };
// stage range
-static const int8_t inv_stage_range_col_dct_64[12] = { 19, 19, 19, 19, 19, 19,
- 19, 19, 19, 19, 18, 18 };
-static const int8_t inv_stage_range_row_dct_64[12] = { 20, 20, 20, 20, 20, 20,
- 20, 20, 20, 20, 20, 20 };
-static const int8_t inv_stage_range_idx_64[1] = { 20 };
+static const int8_t inv_stage_range_col_dct_64[12] = { 11, 11, 11, 11, 11, 11,
+ 11, 11, 11, 11, 10, 10 };
+static const int8_t inv_stage_range_row_dct_64[12] = { 11, 11, 11, 11, 11, 11,
+ 11, 11, 11, 11, 11, 11 };
+
+static const int8_t inv_stage_range_idx_64[1] = { 0 };
// cos bit
static const int8_t inv_cos_bit_col_dct_64[12] = { 13, 13, 13, 13, 13, 13,
@@ -126,9 +136,8 @@ static const int8_t inv_cos_bit_row_dct_64[12] = { 12, 12, 12, 12, 12, 12,
// ---------------- row config inv_dct_4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_4 = {
- 4, // .txfm_size
- 4, // .stage_num
- // 0, // .log_scale
+ 4, // .txfm_size
+ 4, // .stage_num
inv_shift_4, // .shift
inv_stage_range_row_dct_4, // .stage_range
inv_cos_bit_row_dct_4, // .cos_bit
@@ -137,9 +146,8 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_4 = {
// ---------------- row config inv_dct_8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_8 = {
- 8, // .txfm_size
- 6, // .stage_num
- // 0, // .log_scale
+ 8, // .txfm_size
+ 6, // .stage_num
inv_shift_8, // .shift
inv_stage_range_row_dct_8, // .stage_range
inv_cos_bit_row_dct_8, // .cos_bit_
@@ -147,9 +155,8 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_8 = {
};
// ---------------- row config inv_dct_16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_16 = {
- 16, // .txfm_size
- 8, // .stage_num
- // 0, // .log_scale
+ 16, // .txfm_size
+ 8, // .stage_num
inv_shift_16, // .shift
inv_stage_range_row_dct_16, // .stage_range
inv_cos_bit_row_dct_16, // .cos_bit
@@ -158,15 +165,15 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_16 = {
// ---------------- row config inv_dct_32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_32 = {
- 32, // .txfm_size
- 10, // .stage_num
- // 1, // .log_scale
+ 32, // .txfm_size
+ 10, // .stage_num
inv_shift_32, // .shift
inv_stage_range_row_dct_32, // .stage_range
inv_cos_bit_row_dct_32, // .cos_bit_row
TXFM_TYPE_DCT32 // .txfm_type
};
+#if CONFIG_TX64X64
// ---------------- row config inv_dct_64 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_64 = {
64, // .txfm_size
@@ -176,12 +183,12 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_64 = {
inv_cos_bit_row_dct_64, // .cos_bit
TXFM_TYPE_DCT64, // .txfm_type_col
};
+#endif // CONFIG_TX64X64
// ---------------- row config inv_adst_4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_4 = {
- 4, // .txfm_size
- 6, // .stage_num
- // 0, // .log_scale
+ 4, // .txfm_size
+ 6, // .stage_num
inv_shift_4, // .shift
inv_stage_range_row_adst_4, // .stage_range
inv_cos_bit_row_adst_4, // .cos_bit
@@ -190,9 +197,8 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_4 = {
// ---------------- row config inv_adst_8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_8 = {
- 8, // .txfm_size
- 8, // .stage_num
- // 0, // .log_scale
+ 8, // .txfm_size
+ 8, // .stage_num
inv_shift_8, // .shift
inv_stage_range_row_adst_8, // .stage_range
inv_cos_bit_row_adst_8, // .cos_bit
@@ -201,9 +207,8 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_8 = {
// ---------------- row config inv_adst_16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_16 = {
- 16, // .txfm_size
- 10, // .stage_num
- // 0, // .log_scale
+ 16, // .txfm_size
+ 10, // .stage_num
inv_shift_16, // .shift
inv_stage_range_row_adst_16, // .stage_range
inv_cos_bit_row_adst_16, // .cos_bit
@@ -212,9 +217,8 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_16 = {
// ---------------- row config inv_adst_32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_32 = {
- 32, // .txfm_size
- 12, // .stage_num
- // 1, // .log_scale
+ 32, // .txfm_size
+ 12, // .stage_num
inv_shift_32, // .shift
inv_stage_range_row_adst_32, // .stage_range
inv_cos_bit_row_adst_32, // .cos_bit
@@ -223,9 +227,8 @@ static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_32 = {
// ---------------- col config inv_dct_4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_4 = {
- 4, // .txfm_size
- 4, // .stage_num
- // 0, // .log_scale
+ 4, // .txfm_size
+ 4, // .stage_num
inv_shift_4, // .shift
inv_stage_range_col_dct_4, // .stage_range
inv_cos_bit_col_dct_4, // .cos_bit
@@ -234,9 +237,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_4 = {
// ---------------- col config inv_dct_8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8 = {
- 8, // .txfm_size
- 6, // .stage_num
- // 0, // .log_scale
+ 8, // .txfm_size
+ 6, // .stage_num
inv_shift_8, // .shift
inv_stage_range_col_dct_8, // .stage_range
inv_cos_bit_col_dct_8, // .cos_bit_
@@ -244,9 +246,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8 = {
};
// ---------------- col config inv_dct_16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16 = {
- 16, // .txfm_size
- 8, // .stage_num
- // 0, // .log_scale
+ 16, // .txfm_size
+ 8, // .stage_num
inv_shift_16, // .shift
inv_stage_range_col_dct_16, // .stage_range
inv_cos_bit_col_dct_16, // .cos_bit
@@ -255,9 +256,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16 = {
// ---------------- col config inv_dct_32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_32 = {
- 32, // .txfm_size
- 10, // .stage_num
- // 1, // .log_scale
+ 32, // .txfm_size
+ 10, // .stage_num
inv_shift_32, // .shift
inv_stage_range_col_dct_32, // .stage_range
inv_cos_bit_col_dct_32, // .cos_bit_col
@@ -276,9 +276,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_64 = {
// ---------------- col config inv_adst_4 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_4 = {
- 4, // .txfm_size
- 6, // .stage_num
- // 0, // .log_scale
+ 4, // .txfm_size
+ 6, // .stage_num
inv_shift_4, // .shift
inv_stage_range_col_adst_4, // .stage_range
inv_cos_bit_col_adst_4, // .cos_bit
@@ -287,9 +286,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_4 = {
// ---------------- col config inv_adst_8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8 = {
- 8, // .txfm_size
- 8, // .stage_num
- // 0, // .log_scale
+ 8, // .txfm_size
+ 8, // .stage_num
inv_shift_8, // .shift
inv_stage_range_col_adst_8, // .stage_range
inv_cos_bit_col_adst_8, // .cos_bit
@@ -298,9 +296,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8 = {
// ---------------- col config inv_adst_16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16 = {
- 16, // .txfm_size
- 10, // .stage_num
- // 0, // .log_scale
+ 16, // .txfm_size
+ 10, // .stage_num
inv_shift_16, // .shift
inv_stage_range_col_adst_16, // .stage_range
inv_cos_bit_col_adst_16, // .cos_bit
@@ -309,9 +306,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16 = {
// ---------------- col config inv_adst_32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_32 = {
- 32, // .txfm_size
- 12, // .stage_num
- // 1, // .log_scale
+ 32, // .txfm_size
+ 12, // .stage_num
inv_shift_32, // .shift
inv_stage_range_col_adst_32, // .stage_range
inv_cos_bit_col_adst_32, // .cos_bit
@@ -322,9 +318,8 @@ static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_32 = {
// identity does not need to differentiate between row and col
// ---------------- row/col config inv_identity_4 ----------
static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_4 = {
- 4, // .txfm_size
- 1, // .stage_num
- // 0, // .log_scale
+ 4, // .txfm_size
+ 1, // .stage_num
inv_shift_4, // .shift
inv_stage_range_idx_4, // .stage_range
NULL, // .cos_bit
@@ -333,9 +328,8 @@ static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_4 = {
// ---------------- row/col config inv_identity_8 ----------------
static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_8 = {
- 8, // .txfm_size
- 1, // .stage_num
- // 0, // .log_scale
+ 8, // .txfm_size
+ 1, // .stage_num
inv_shift_8, // .shift
inv_stage_range_idx_8, // .stage_range
NULL, // .cos_bit
@@ -344,9 +338,8 @@ static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_8 = {
// ---------------- row/col config inv_identity_16 ----------------
static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_16 = {
- 16, // .txfm_size
- 1, // .stage_num
- // 0, // .log_scale
+ 16, // .txfm_size
+ 1, // .stage_num
inv_shift_16, // .shift
inv_stage_range_idx_16, // .stage_range
NULL, // .cos_bit
@@ -355,13 +348,24 @@ static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_16 = {
// ---------------- row/col config inv_identity_32 ----------------
static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_32 = {
- 32, // .txfm_size
- 1, // .stage_num
- // 1, // .log_scale
+ 32, // .txfm_size
+ 1, // .stage_num
inv_shift_32, // .shift
inv_stage_range_idx_32, // .stage_range
NULL, // .cos_bit
TXFM_TYPE_IDENTITY32, // .txfm_type
};
+
+#if CONFIG_TX64X64
+// ---------------- row/col config inv_identity_32 ----------------
+static const TXFM_1D_CFG inv_txfm_1d_cfg_identity_64 = {
+ 64, // .txfm_size
+ 1, // .stage_num
+ inv_shift_64, // .shift
+ inv_stage_range_idx_64, // .stage_range
+ NULL, // .cos_bit
+ TXFM_TYPE_IDENTITY64, // .txfm_type
+};
+#endif // CONFIG_TX64X64
#endif // CONFIG_EXT_TX
#endif // AV1_INV_TXFM2D_CFG_H_
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-15 04:20:40 +0000