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| author | R. S. Ananda Murthy <rsamurti@gmail.com> | 2014-06-22 11:18:20 +0700 |
|---|---|---|
| committer | Willy Sudiarto Raharjo <willysr@slackbuilds.org> | 2014-06-22 11:18:20 +0700 |
| commit | 8970decff9f6dd0877e845c9af5678770454bbab (patch) | |
| tree | cdf732a84ab2b1f737c42dee8f718841e73e7a23 /academic/verilog | |
| parent | 7d6d52860e05bec0426c3e499053c5144704ddf3 (diff) | |
| download | slackbuilds-8970decff9f6dd0877e845c9af5678770454bbab.tar.gz | |
academic/drawtiming: Added (tool for drawing timing diagrams).
Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
Diffstat (limited to 'academic/verilog')
0 files changed, 0 insertions, 0 deletions